1. Field of the Invention
This invention relates to a power semiconductor device and a method for producing the same, and particularly to a vertical power semiconductor device having a super-junction structure and a method for producing the same.
2. Background Art
Power semiconductor devices such as MOSFET (metal-oxide-semiconductor field effect transistor) and IGBT (Insulated Gate Bipolar Transistor) have high-speed switching characteristics and reverse blocking voltage of some tens to some hundreds of V (hereinafter, referred to as breakdown voltage). Therefore, the power semiconductor devices are widely used for conversion, control, and so forth of the power in instruments such as, home appliances, communication devices and control devices of an in-vehicle motor. For achieving downsizing, efficiency enhancement, and power consumption reduction in these instruments, resistance in an ON state of the power semiconductor device (hereinafter, referred to as ON resistance) is required to be reduced. That is, in power semiconductor devices such as MOSFET or IGBT, it is strongly required that the ON resistance is reduced while keeping the high breakdown voltage.
In general, in the power semiconductor device, a drift layer through which current is flowed in the ON state. When high voltage is applied thereto in an OFF state, the drift layer is depleted to hold the voltage. Therefore, for improving the breakdown voltage, it is effective that the drift layer is thick and has a low concentration. On the other hand, in a semiconductor device, a channel is formed in an ON state and current flows through the drift layer. Therefore, for reducing the ON resistance, it is effective that the drift layer is thin and has a high concentration. Thus there is a tradeoff relation between the breakdown voltage and the ON resistance. In general, the ON resistance is proportion to 2.4 to 2.7 power of the breakdown voltage. That is, when the breakdown voltage is enhanced, the ON resistance also becomes high. There is a theoretical limit determined by characteristics of the semiconductor material (such as silicon) for satisfying both of the breakdown voltage and the ON resistance.
As a structure for realizing characteristics exceeding the theoretical limit of the semiconductor material, the super-junction (hereinafter, also referred to as SJ structure) has been proposed, a structure with p-type pillar layers and n-type pillar layers buried in the drift layer is known as a super-junction structure (see, for example, Fujihira et. al., “Theory of Semiconductor Super junction Devices” Jpn. J. Appl. Phys. Vol. 36 (1997) pp. 6254-6262). In a semiconductor device before emergence of the SJ structure, the drift layer has been formed by a simple n-type layer. By contrast, in the SJ structure, the drift layer is formed by n-type pillar regions and the p-type pillar layers having high concentrations and a high aspect ratio that are alternatively arranged along the direction orthogonal to the direction to which the current flows. In the SJ structure, in the OFF state, high voltage is applied between the n-type pillar region and the p-type pillar region and each of the pillar regions is depleted, and thereby, high breakdown voltage is realized. On the other hand, in the ON state, the impurity concentration of the n-type pillar regions, which are current passages, is high, and therefore, low ON resistance is realized.
The present inventors have developed and disclosed a technique by which in such a power semiconductor device having the SJ structure, an n-type buffer layer having a lower concentration than that of the n-type pillar region is provided between the drain electrode and the SJ structure to improve the reverse recovery characteristics of the internal diode and to improve the balance between the breakdown voltage and the ON resistance (see, for example, JP-A 2003-101022 (Kokai)). Moreover, as a method for forming such a semiconductor device, the present inventors have developed and disclosed a method including, growing an n-type epitaxial layer on an n-type semiconductor substrate, selectively ion-implanting n-type impurity and p-type impurity to the n-type epitaxial layer, then repeating epitaxial growth and ion implantation, finally performing thermal diffusion treatment to connect the n-type diffusion regions and the p-type diffusion regions respectively between the epitaxial layers, and thereby forming n-type pillar regions and p-type pillar regions having a high aspect ratio (see, FIG. 4 of JP-A 2003-258252 (Kokai) and W. Saito, et al, “Semi super junction MOSFETs: New Design Concept for Lower On-Resistance and Softer Reverse-Recovery Body Diode”, IEEE Trans Electron Devices, Vol. 50, No. 8, August 2003, pp. 1801-1806).
As described above, when the power semiconductor device in which the n-type buffer layer and the SJ structure are serially connected, more preferable reverse recovery characteristics of internal diode can be realized and the high balance of breakdown voltage/ON resistance can be realized, compared to a power semiconductor device in which the SJ structure is independently formed. However, in recent years, in the power semiconductor device, further breakdown voltage enhancement and ON resistance reduction has been required.